[1]. Qicong Li, Haijun Lou* and Linli Zhu*, Strain effect on the performance of proton‑irradiated GaN‑based HEMT, Applied Physics A (2023) 129:374.
[2]. 佘璇,楼海君*,宋仁庭,李琪聪,金仲和,微纳卫星总剂量评估优化研究,北京航空航天大学学报.
[3]. Yumei Yang, Haijun Lou*, Interfacial Shearing and Transverse Normal Stress in a Superconducting Coated Conductor Strip with Combined Transport Current and Magnetic Field, Journal of Superconductivity and Novel Magnetism volume 36, pages821–829 (2023).
[4]. Wentao Li, Haijun Lou* and Xinnan Lin*, Investigation of trench process variation on the recessed-gate junctionless MOSFETs considering the circuit application, Semicond. Sci. Technol. 35 (2020) 085002 (10pp).
[5]. Gengshu Wu, Haijun Lou*, Kai Liu and Xinnan Lin*, The study of bending properties of monolayer MoS2 in non-collinear electrodes using first principles theory, Phys. Chem. Chem. Phys., 2020, 22, 21888-21892.
[6]. Luodan Hu, Haijun Lou*, Wentao Li, Kuan-Chang Chang*, Xinnan Lin*, Suppression of Statistical Variability in Junctionless FinFET Using Accumulation-Mode and Charge Plasma Structure, IEEE Transactions on Electron Devices, 2020-11, 68, 1, 399-404.
[7].Yumei Yang, Haijun Lou*, Xinnan Lin, High-k Spacer Consideration Of Ultra-scaled Gate-All-Around Junctionless Transistor In Ballistic Regime, IEEE Transactions on Electron Devices. Vol. 65, No. 12, pp. 5282-5288, Dec. 2018.
[8].Wenbo Wan, Haijun Lou*, Ying Xiao and Xinnan Lin*, Source/Drain Engineered Charge-Plasma Junctionless Transistor for the Immune of Line Edge Roughness Effect, IEEE Transactions on Electron Devices. Vol. 65, No. 5, pp. 1873-1879, May 2018.
[9].Peng Xu, Haijun Lou*, Lining Zhang, Zhonghua Yu and Xinnan Lin*, “Compact Model for Double-Gate Tunnel FETs With Gate Drain Underlap”, IEEE Transactions on Electron Devices, Dec. 2017. No. 64 Issue:12, PP5242-5248.
[10].Ying Xiao, Baili Zhang, Haijun Lou*, Lining Zhang, Xinnan Lin*. A compact model of subthreshold current with source/drain depletion effect for the short-channel junctionless cylindrical surrounding-gate MOSFETs. IEEE Transactions on Electron Devices, 63(5), 2176-2181(2016).
[11].Ying Xiao, Xinnan Lin*, Haijun Lou*, Baili Zhang, Lining Zhang and Mansun Chan. A Short Channel Double-Gate Junctionless Transistor Model Including the Dynamic Channel Boundary Effect. IEEE Transactions on Electron Devices, 63(12), 4661-4667(2016).
[12].Xinnan Lin*, Baili Zhang, Ying Xiao, Haijun Lou*, Lining Zhang and Mansun Chan. Analytical current model for long-channel junctionless double-gate MOSFETs. IEEE Transactions on Electron Devices, 63(3), 959-965(2016).
[13].Haijun Lou, Baili Zhang, Dan Li, Xinnan Lin, Jin He and Mansun Chan, Suppression of subthreshold characteristics variation for junctionless multigate transistors using high-k spacers, Semicond. Sci. Technol. 30 (2015) 015008 (7pp).
[14].Haijun Lou, Dan Li, Yan Dong, Xinnan Lin, Jin He, Shengqi Yang and Mansun Chan, Suppression of Tunneling Leakage Current in Junctionless Nanowire Transistors, Semicond. Sci. Technol.28 (2013) 125016 (6pp)
[15].Haijun Lou, Dan Li, Yan Dong, Xinnan Lin, Shengqi Yang, Jin He, and Mansun Chan, Effects of Fin Sidewall Angle on Subthreshold Characteristics of Junctionless Multigate Transistors,Jpn. J. Appl. Phys. 52 (2013) 104302
[16].Haijun Lou, Binghua Li, Xinnan Lin, Jin He, Mansun Chan, Investigations of fin vertical nonuniformity effects on junctionless multigate transistor. Environmental Science and Technology, 46, 17 (2012) , 9709-9715.
[17].Haijun Lou, Lining Zhang, Yunxi Zhu, Xinnan Lin, Shengqi Yang, Jin He and Mansun Chan, A Junctionless Nanowire Transistor With Dual-Material-Gate, IEEE Transactions on Electron Devices,Jul. 2011. No. 59 Issue:7, PP1829 – 1836.